Pin

Logic

Symbol

Name/Description

Ref.

1

GND

Ground

1

2

CML-I

Tx2n

Transmitter Inverted Data Input

3

CML-I

Tx2p

Transmitter Non-Inverted Data Input

4

GND

Ground

1

5

CML-I

Tx4n

Transmitter Inverted Data Input

6

CML-I

Tx4p

Transmitter Non-Inverted Data Input

7

GND

Ground

1

8

LVTTL-I

ModSe1L

Module Select

9

LVTTL-I

ResetL

Module Reset

10

Vcc Rx

+3.3V Power supply receiver

11

LVCMOS-I

SCL

2-wire serial interface clock

12

LVCMOS-I/O

SDA

2-wire serial interface data

13

GND

Ground

1

14

CML-O

Rx3p

Receiver Non-Inverted Data Output

15

CML-O

Rx3n

Receiver Inverted Data Output

16

GND

Ground

1

17

CML-O

Rx1p

Receiver Non-Inverted Data Output

18

CML-O

Rx1n

Receiver Inverted Data Output

19

GND

Ground

1

20

GND

Ground

1

21

CML-O

Rx2n

Receiver Inverted Data Output

22

CML-O

Rx2p

Receiver Non-Inverted Data Output

23

GND

Ground

1

24

CML-O

Rx4n

Receiver Inverted Data Output

25

CML-O

Rx4p

Receiver Non-Inverted Data Output

26

GND

Ground

1

27

LVTTL-O

ModPrSL

Module Present

28

LVTTL-O

IntL

Interrupt

29

Vcc Tx

+3.3V Power supply transmitter

30

Vcc1

+3.3V Power Supply

31

LVTTL-I

LPMode

Low Power Mode

32

GND

Ground

1

33

CML-I

Tx3p

Transmitter Non-Inverted Data Input

34

CML-I

Tx3n

Transmitter Inverted Data Input

35

GND

Ground

1

36

CML-I

Tx1p

Transmitter Non-Inverted Data Input

37

CML-I

Tx1n

Transmitter Inverted Data Input

38

GND

Ground

1